italian version

Aims :

Acquisition of knowledge on methodologies for system level design of Systems on Chip.

Topics :

System Level Design
System on Chip
SystemC: System Level description language
System on chip bus: AMBA AHB e APB bud
Design of low power digital systems: Power models, power reduction tecniques, dynamic power management, System Level Power Estimation.
Design for Testability: defect models of digital circuits, fault detection. Design techniques for testability: ad hoc circuitry, testability measurements, scan-path techniques, Built in Self-Test. Fault tolerant systems.
(see www.laureaelettronica.univpm.it).

Textbooks :

Teacher's notes.
G.Bucci, "Architetture dei calcolatori elettronici", McGraw-Hill, 2001
Hennessy, Patterson, Computer architecture a quantitative approach, Morgan Kaufman.

Exam :

Discussion on a project developed by the student e an oral test.

Tutorial Session :

Tuesday and thursday 10.30-12.30.